1. Field of the Invention
The invention relates generally to a multi-step pulse generating circuit and a method of erasing a flash memory using the same which can reduce the erasing time for the flash memory.
2. Description of the Prior Art
Generally, the procedure of erasing the flash memory cell includes a pre-program step, an erase step and a post-program step. Recently, a multi-step pulse erase method is used to improve the threshold voltage level of the erased memory cell.
However, though the multi-step pulse erase method can improve the threshold voltage level of the memory cell, it has a disadvantage that requires a lot of time since it has to perform pumping in multi-steps. Actually, the pumping, in erasing one sector using the multi-step pulses, requires the time of about 200 ms. Thus, it has a disadvantage that the time of 1400 ms is consumed only for the pumping because there are seven sectors for the memory chip of 200 Mb.
In addition, in case that the suspense command is input during the erasure operation, the erase operation new being performed is suspended and a read mode is then performed. Then, the erase operation is resumed by means of the resume command. However, it has a disadvantage that information on the previous pumping number cannot be found since the block for counting the pumping number of the multi-step pulses in reset upon transformation into the read mode. In other words, when the erase operation is resumed, it requires the time of about 200 ms for the multi-step words, when the erase operation is resumed, it requires the time of about 200 ms for the multi-step pulse erase in one sector since the multi-step erase operation has to be performed from the start. Also, when resuming the erase operation, if the multi-step pulse erase procedure is emitted, the multi-step pulse erase is meaningless.